Arithmetic
Name
Regs
Opcode
Description
PADDB
register, memory/register
0F FC mod-rm
Add with wrap-around on byte
PADDW
register, memory/register
0F FD mod-rm
Add with wrap-around on word
PADDD
register, memory/register
0F FE mod-rm
Add with wrap-around on doubleword
PADDSB
register, memory/register
0F EC mod-rm
Add signed with saturation on byte
PADDSW
register, memory/register
0F ED mod-rm
Add signed with saturation on word
PADDUSB
register, memory/register
0F DC mod-rm
Add unsigned with saturation on byte
PADDUSW
register, memory/register
0F DD mod-rm
Add unsigned with saturation on word
PSUBB
register, memory/register
0F F8 mod-rm
Subtraction with wrap-around on byte
PSUBW
register, memory/register
0F F9 mod-rm
Subtraction with wrap-around on word
PSUBD
register, memory/register
0F FA mod-rm
Subtraction with wrap-around on doubleword
PSUBSB
register, memory/register
0F E8 mod-rm
Subtract signed with saturation on byte
PSUBSW
register, memory/register
0F E9 mod-rm
Subtract signed with saturation on word
PSUBUSB
register, memory/register
0F D8 mod-rm
Subtract unsigned with saturation on byte
PSUBUSW
register, memory/register
0F D9 mod-rm
Subtract unsigned with saturation on word
PMULHW
register, memory/register
0F E5 mod-rm
Packed multiply high on words
PMULLW
register, memory/register
0F D5 mod-rm
Packed multiply low on words
PMADDWD
register, memory/register
0F F5 mod-rm
Packed multiply on words and add resulting pairs
Comparison
Name
Regs
Opcode
Description
PCMPEQB
register, memory/register
0F 74 mod-rm,
Packed compare for equality byte
PCMPEQW
register, memory/register
0F 75 mod-rm
Packed compare for equality word
PCMPEQD
register, memory/register
0F 76 mod-rm
Packed compare for equality doubleword
PCMPGTB
register, memory/register
0F 64 mod-rm
Packed compare greater than byte
PCMPGTW
register, memory/register
0F 65 mod-rm
Packed compare greater than word
PCMPGTD
register, memory/register
0F 66 mod-rm
Packed compare greater than doubleword
Conversion
Name
Regs
Opcode
Description
PACKUSWB
register, memory/register
0F 67 mod-rm
Pack words into bytes (unsigned with saturation)
PACKSSWB
register, memory/register
0F 63 mod-rm
Pack words into bytes (signed with saturation)
PACKSSDW
register, memory/register
0F 6B mod-rm
Pack doublewords into words (signed with saturation)
PUNPCKHBW
register, memory/register
0F 68 mod-rm
Unpack (interleave) high-order bytes from MMX TM register
PUNPCKHWD
register, memory/register
0F 69 mod-rm
Unpack (interleave) high-order words from MMX TM register
PUNPCKHDQ
register, memory/register
0F 6A mod-rm
Unpack (interleave) high-order doublewords from MMX TM register
PUNPCKLBW
register, memory/register
0F 60 mod-rm
Unpack (interleave) low-order bytes from MMX register
PUNPCKLWD
register, memory/register
0F 61 mod-rm
Unpack (interleave) low-order words from MMX register
PUNPCKLDQ
register, memory/register
0F 62 mod-rm
Unpack (interleave) low-order doublewords from MMX register
Logical
Name
Regs
Opcode
Description
PAND
register, memory/register
0F DB mod-rm
Bitwise AND
PANDN
register, memory/register
0F DF mod-rm
Bitwise AND NOT
POR
register, memory/register
0F EB mod-rm
Bitwise OR
PXOR
register, memory/register
0F EF mod-rm
Bitwise XOR
Shift
Name
Regs
Opcode
Description
PSLLW
register, memory/register
0F F1 mod-rm
Packed shift left logical word by amount specified in MMX register or by immediate value
PSLLD
register, memory/register
0F F2 mod-rm, [sib]
Packed shift left logical doubleword by amount specified in MMX register or by immediate value
PSLLQ
register, memory/register
0F F3 mod-rm
Packed shift left logical quadword by amount specified in MMX register or by immediate value
PSRLW
register, memory/register
0F D1 mod-rm
Packed shift right logical word by amount specified in MMX register or by immediate value
PSRLD
register, memory/register
0F D2 mod-rm
Packed shift right logical doubleword by amount specified in MMX register or by immediate value
PSRLQ
register, memory/register
0F D3 mod-rm
Packed shift right logical quadword by amount specified in MMX register or by immediate value
PSRAW
register, memory/register
0F E1 mod-rm
Packed shift right arithmetic word by amount specified in MMX register or by immediate value
PSRAD
register, memory/register
0F E2 mod-rm
Packed shift right arithmetic doubleword by amount specified in MMX register or by immediate value
PSHIMW*
register, immediate
0F 71 mod-rm, imm
PSHIMD*
register, immediate
0F 72 mod-rm, imm
PSHIMQ*
register, immediate
0F 73 mod-rm, imm
Notes: * These are not the actual mnemonics: PSHIMD represents the PSLLD, PSRAD and PSRLD instructions when shifting by immediate shift counts. PSHIMW represents the PSLLW, PSRAW and PSRLW instructions when shifting by immediate shift counts. PSHIMQ represents the PSLLQ and PSRLQ instructions when shifting by immediate shift counts. The instructions that shift by immediate counts are differentiated by the ModR/M bytes.
Data Transfer
Name
Regs
Opcode
Description
MOVD
register, memory/iregister
0F 6E mod-rm
Move doubleword to MMX register or from MMX register
MOVD
memory/iregister, register
0F 7E mod-rm
Move doubleword to MMX register or from MMX register
MOVQ
register, memory/register
0F 6F mod-rm
Move quadword to MMX register or from MMX register
MOVQ
memory/register, register
0F 7F mod-rm
Move quadword to MMX register or from MMX register
FP & MMX State Mgmt
Name
Regs
Opcode
Description
EMMS
0F 77
Empty MMX state
