可重配置计算：体系结构与应用： ARC 2006 第2届国际研讨会/论文集LNCS-3985: Reconfigurable computing
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作者： Koen Bertels著
出 版 社： 湖北辞书出版社
出版时间： 2006-12-1字数：版次： 1页数： 468印刷时间： 2006/12/01开本：印次：纸张： 胶版纸I S B N ： 9783540367086包装： 平装编辑推荐
The LNCS series reports state-of-the-art results in computer science research, development, and education, at a high level and in both printed and electronic form. Enjoying tight cooperation with the R&D community, with numerous individuals, as well as with prestigious organizations and societies, LNCS has grown into the most comprehensive computer science resarch forum available.
The scope of LNCS, including its subseries LNAI, spans the whole range of computer science and information technology including interdisciplinary topics in a variety of application fields. The type of material publised traditionally includes.
-proceedings(published in time for the respective conference)
-post-proceedings(consisting of thoroughly revised final full papers)
-research monographs(which may be basde on outstanding PhD work, research projects, technical reports, etc.)
内容简介
This book constitutes the thoroughly refereed post-proceedings of the Second International Workshop on Reconfigurable Computing, ARC 2006, held in Delft, The Netherlands, in March 2006.
The 22 revised full papers and 35 revised short papers presented were thoroughly reviewed and selected from 95 submissions. The papers are organized in topical sections on applications, power, image processing, organization and architecture, networks and communication, security, and tools.
目录
Applications
Implementation of Realtime and Highspeed Phase Detector on FPGA
Case Study: Implementation of a Virtual Instrument on a DynamicallyReconfigurable Platform
Configurable Embedded Core for Controlling Electro-MechanicalSystems
Evaluation of a Locomotion Algorithm for Worm-Like Robots onFPGA-Embedded Processors
Dynamic Partial Reconfigurable FIR Filter Design
Event-Driven Simulation Engine for Spiking Neural Networks on a Chip
Towards an Optimal Implementation of MLP in FPGA
Power
Energy Consumption for Transport of Control Information on aSegmented Software-Controlled Communication Architecture
Quality Driven Dynamic Low Power Reconfiguration of Handhelds
An Efficient Estimation Method of Dynamic Power Dissipation on VLSI interconnects
Image Processing
Highly Paralellized Architecture for Image Motion Estimation
Design Exploration of a Video Pre-processor for an FPGA Based SoC
QUKU: A Fast Run Time Reconfigurable Platform for Image EdgeDetection
Applications of Small-Scale Reconfigurability to Graphics Processors
An Embedded Multi-camera System for Simultaneous Localization andMapping
Performance/Cost Trade-Off Evaluation for the DCT Implementationon the Dynanmcally Reconfigurable Processor
Trigonometric Computing Embedded in a Dynamically ReconfigurableCORDIC System-on-Chip
Handel-C Design Enhancement for FPGA-Based DV Decoder
Run-Time Resources Management on Coarse Grained, Packet-SwitchingReconfigurable Architecture: A Case Study Through the APACHES’Platform
A New VLSI Architecture of Lifting-Based DWT
……
Organization and Architecture
Networks and Communication
Security
Tools
Author Index
