VLSI的统计分析与优化：时序和功耗
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作者： （美）安歇斯等著
出 版 社： 科学出版社
出版时间： 2007-8-1字数： 457000版次： 1页数： 279印刷时间： 2007/08/01开本：印次：纸张： 胶版纸I S B N ： 9787030188502包装： 平装内容简介
该书介绍了集成电路的统计CAD工具的相关知识。主要面向CAD工具开发人员、集成电路工艺技术人员，以及相关学科的学生和研究人员。书中介绍了统计时序和功耗分析技术中的最新研究成果，并结合参数化的产量作为设计过程中的主要目标函数。该书强调算法、过程变量的建模方法，以及统计方法。既可作为刚涉足CAD工具开发领域的人员的入门书籍，也可作为该领域工程师的参考手册。
目录
Preface
1 Introduction
1.1 Sources of Variations
1.1.1 Process Variations
1.1.2 Environmental Variations
1.1.3 Modeling Variations
1.1.4 Other Sources of Variations
1.2 Components of Variation
1.2.1 Inter-die Variations
1.2.2 Intra-die Variations
1.3 Impact on Performance
2 Statistical Models and Techniques.
2.1 Monte Carlo Techniques
2.1.1 Sampling Probability Distributions
2.2 Process Variation Modeling
2.2.1 Pelgrom's Model
2.2.2 Principal Components Based Modeling
2.2.3 Quad-Tree Based Modeling
2.2.4 Specialized Modeling Techniques
2.3 Performance Modeling
2.3.1 Response Surface Methodology
2.3.2 Non-Normal Performance Modeling
2.3.3 Delay Modeling
2.3.4 Interconnect Delay Models
2.3.5 Reduced-Order Modeling Techniques
3 Statistical Timing Analysis
3.1 Introduction
3.2 Block-Based Timing Analysis
3.2.1 Discretized Delay PDFs
3.2.2 Reconvergent Fanouts
3.2.3 Canonical Delay PDFs
3.2.4 Multiple Input Switching
3.3 Path-Based Timing Analysis
3.4 Parameter-Space Techniques
3.4.1 Parallelepiped Method
3.4.2 Ellipsoid Method
3.4.3 Case-File Based Models for Statistical Timing
3.5 Bayesian Networks
4 Statistical Power Analysis
4.1 Overview
4.2 Leakage Models
4.3 High-Level Statistical Analysis
4.4 Gate-Level Statistical Analysis
4.4.1 Dynamic Power
4.4.2 Leakage Power
4.4.3 Temperature and Power Supply Variations
5 Yield Analysis
5.1 High-Level Yield Estimation
5.1.1 Leakage Analysis
5.1.2 Frequency Binning
5.1.3 Yield Computation
5.2 Gate-Level Yield Estimation
5.2.1 Timing Analysis
5.2.2 Leakage Power Analysis
5.2.3 Yield Estimation
5.3 Supply Voltage Sensitivity
6 Statistical Optimization Techniques
6.1 Optimization of Process Parameters
6.1.1 Timing Constraint
6.1.2 Objective Function
6.1.3 Yield Allocation
6.2 Gate Sizing
6.2.1 Nonlinear Programming
6.2.2 Lagrangian Relaxation
6.2.3 Utility Theory
6.2.4 Robust Optimization
6.2.5 Sensitivity-Based Optimization
6.3 Buffer Insertion
6.3.1 Deterministic Approach
6.3.2 Statistical Approach
6.4 Threshold Voltage Assignment
6.4.1 Sensitivity-Based Optimization
6.4.2 Dynamic Programming
References
Index